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GPUBeat Chips & Hardware AMD Commences Production of 2nm EPYC…

AMD Commences Production of 2nm EPYC Processors to Meet AI Infrastructure Demand

AMD has initiated production of its 6th Gen EPYC CPUs, Venice, on TSMC's 2nm technology, marking a pivotal development in AI infrastructure. The move caters to the growing demand for high-performance computing.

AMD ramps 2nm EPYC CPUs for AI infrastructure — AMD, TSMC
AMD Commences Production of 2nm EPYC Processors to Meet AI Infrastructure Demand Source: GPUBeat

AMD has officially begun the production of its 6th Generation EPYC processors, codenamed "Venice," using TSMC's state-of-the-art 2nm process technology. This milestone marks AMD as the first company in the industry to ramp up high-performance computing (HPC) products on such advanced technology. The Venice processors are poised to address the growing demand for accelerated AI infrastructure, particularly as agentic AI workloads become more common.

Accelerating AI Infrastructure

The ramp-up for Venice coincides with a rapidly changing AI environment. Dr. Lisa Su, AMD's chair and CEO, remarked, "Ramping 'Venice' on TSMC 2nm process technology marks an important step forward in accelerating the next generation of AI infrastructure." This highlights the company's awareness of the pressing need for platforms that can ease the transition from innovation to production in AI applications. The Venice processors are anticipated to improve data handling, networking, and system orchestration across data centers, which is essential for scaling AI operations effectively.

TSMC Collaboration and Future Prospects

AMD's partnership with TSMC is key to enhancing its manufacturing capabilities. Currently, production is ramping up in Taiwan, with plans to expand operations to TSMC's facility in Arizona. This geographic diversification reflects AMD's commitment to strengthening its advanced manufacturing footprint, important for meeting the global demand for EPYC processors. Dr. C.C. Wei, Chairman and CEO of TSMC, expressed satisfaction with their collaboration, emphasizing the significance of merging advanced process technology with innovative design to propel the next generation of AI computing.

Building on Venice with Verano

After the Venice production, AMD plans to introduce another processor, named "Verano," which will integrate LPDDR memory. The Verano processor aims to address the increasing complexity of AI workloads, delivering enhanced performance tailored for cloud and AI computing scenarios. The advancements in memory technology, combined with the efficiencies of the 2nm process, are expected to result in superior performance-per-dollar-per-watt metrics, key in today's energy-conscious market.

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Implications for the AI Market

As AI adoption extends beyond traditional applications into more advanced agentic workloads, the importance of CPUs is growing. The Venice processors will not only strengthen AMD's position in the server market but also provide the necessary computational power for modern cloud and enterprise solutions. With AMD's ongoing commitment to innovation in product design and manufacturing, the company is well-equipped to meet the demands of a fast-moving technological landscape.

AMD's strategic emphasis on utilizing TSMC's advancements in semiconductor technology is set to transform AI infrastructure capabilities. As the company continues to broaden its product offerings and manufacturing capabilities, it is prepared to support customers in deploying and scaling stable AI solutions across various sectors. With Venice and Verano leading the way, AMD is positioned to play a significant role in the evolution of AI computing.

GD

GPUBeat Desk

Desk · joined 2026

GPUBeat Desk covers AI infrastructure — chips, foundation models, inference economics, datacenter buildouts, and the geopolitics of compute.